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SAT-Based Scalable Formal Verification Solutions (Integrated Circuits and Systems) - Ganai, Malay, Gupta, Aarti
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Ganai, Malay, Gupta, Aarti:

SAT-Based Scalable Formal Verification Solutions (Integrated Circuits and Systems) - encadernado, livro de bolso

2007, ISBN: 9780387691664

Springer, Gebundene Ausgabe, Auflage: 2007, 360 Seiten, Publiziert: 2007-05-22T00:00:01Z, Produktgruppe: Buch, Hersteller-Nr.: 22587001, 1.55 kg, CAD & CAM, Grafik & Multimedia, Computer … mais…

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SAT-Based Scalable Formal Verification Solutions - Gupta, Aarti; Ganai, Malay
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Gupta, Aarti; Ganai, Malay:

SAT-Based Scalable Formal Verification Solutions - encadernado, livro de bolso

2007, ISBN: 0387691669

2007 Gebundene Ausgabe EDV / Theorie / Software-Entw. / Software Engineering, Elektrotechnik, Computer-Aided Design (CAD), algorithms; complexity; computer-aideddesign(CAD); designproce… mais…

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Malay Ganai; Aarti Gupta,:
SAT-Based Scalable Formal Verification Solutions (eBook Rental) - novo libro

ISBN: 9780387691664

by Malay Ganai; Aarti Gupta, PRINT ISBN: 9780387691664 E-TEXT ISBN: 9780387691671 Springer Nature eBook Other pricing structure might be available at vitalsource.com., Springer

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SAT-Based Scalable Formal Verification Solutions - Ganai, Malay und Aarti Gupta
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Ganai, Malay und Aarti Gupta:
SAT-Based Scalable Formal Verification Solutions - livro usado

2007, ISBN: 9780387691664

[PU: Springer US], Neubindung 3487105/12, DE, [SC: 0.00], gebraucht; sehr gut, gewerbliches Angebot, 2007, Banküberweisung, Kreditkarte, PayPal, Klarna-Sofortüberweisung, International sh… mais…

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SAT-Based Scalable Formal Verification Solutions - Ganai, Malay und Aarti Gupta
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Ganai, Malay und Aarti Gupta:
SAT-Based Scalable Formal Verification Solutions - livro usado

2007, ISBN: 9780387691664

[PU: Springer US], Neubindung 3487105/12, DE, [SC: 0.00], gebraucht; sehr gut, gewerbliches Angebot, 2007, Banküberweisung, PayPal, Klarna-Sofortüberweisung, Internationaler Versand

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SAT-Based Scalable Formal Verification Solutions (Integrated Circuits and Systems)
Autor:
Título:
Número ISBN:

0387691669


This book provides an engineering insight into how to provide a scalable and robust verification solution with ever increasing design complexity and sizes. It describes SAT-based model checking approaches and gives engineering details on what makes model checking practical. The book brings together the various SAT-based scalable emerging technologies and techniques covered can be synergistically combined into a scalable solution.

Dados detalhados do livro - SAT-Based Scalable Formal Verification Solutions (Integrated Circuits and Systems)


EAN (ISBN-13): 9780387691664
ISBN (ISBN-10): 0387691669
Livro de capa dura
Livro de bolso
Ano de publicação: 2007
Editor/Editora: Springer
330 Páginas
Peso: 0,703 kg
Língua: eng/Englisch

Livro na base de dados desde 2007-11-11T16:18:47+00:00 (Lisbon)
Página de detalhes modificada pela última vez em 2023-08-03T12:26:57+01:00 (Lisbon)
Número ISBN/EAN: 0387691669

Número ISBN - Ortografia alternativa:
0-387-69166-9, 978-0-387-69166-4
Ortografia alternativa e termos de pesquisa relacionados:
Autor do livro: malay, mala gupta, jameson
Título do livro: sat based scalable formal verification solutions, integrated circuits

Dados da editora

Autor: Malay Ganai; Aarti Gupta
Título: Integrated Circuits and Systems; SAT-Based Scalable Formal Verification Solutions
Editora: Springer; Springer US
330 Páginas
Ano de publicação: 2007-05-22
New York; NY; US
Língua: Inglês
160,49 € (DE)
164,99 € (AT)
177,00 CHF (CH)
Available
XXX, 330 p. 118 illus.

BB; Hardcover, Softcover / Informatik, EDV/Anwendungs-Software; Computer-Aided Design (CAD); Verstehen; algorithms; complexity; computer-aided design (CAD); design process; model; modeling; Computer-Aided Engineering (CAD, CAE) and Design; Electronic Circuits and Systems; Electrical and Electronic Engineering; Schaltkreise und Komponenten (Bauteile); Elektrotechnik; BC

Design Verification Challenges.- Design Verification Challenges.- Background.- Basic Infrastructure.- Efficient Boolean Representation.- Hybrid DPLL-Style SAT Solver.- Falsification.- SAT-Based Bounded Model Checking.- Distributed SAT-Based BMC.- Efficient Memory Modeling in BMC.- BMC for Multi-Clock Systems.- Proof Methods.- Proof by Induction.- Unbounded Model Checking.- Abstraction/Refinement.- Proof-Based Iterative Abstraction.- Verification Procedure.- SAT-Based Verification Framework.- Synthesis for Verification.
Describes SAT-based model checking approaches and gives engineering details on what makes model checking practical Techniques covered can be synergistically combined into a scalabe solution Focuses on engineering design and not mathematics Includes supplementary material: sn.pub/extras
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